3.3 List and briefly define two approaches
to dealing with multiple interrupts.
Answer :The approach are given bellow
:
·
Disable all interrupts while an
interrupt is being processed.
·
Define priorities for interrupts and
to allow an interrupt of higher priority to cause a lower-priority interrupt
handler to be interrupted.
3.5 What is the benefit of using a multiple-bus architecture compared to a single-bus architecture?
3.5 What is the benefit of using a multiple-bus architecture compared to a single-bus architecture?
Answer :Compared to single-bus
architecture, the using of multiple-bus architecture have a great advantage in
speed and of course, will affect performance also. Instead of using single-bus
architecture, it is more convenient to use multiple-bus architecture. Using
multiple-bus architecture will make each device to connect to own bus, which
means that each device will have its own bus. This way, it will be faster to
transfer data of each devices, so the data transfer doesn't have to stuck like
in the single-bus architecture where many devices are connected to a
single-bus, that will eventually reach the capacity of the bus and thus will
make the data "queue". Of course, it will cost more to have multiple
bus, but the cost will not match the need of faster speed, compared to the one
of that single-bus architecture.
Fetch, Decode, Execute, Store
Executing a single instruction consists of a particular cycle of events; fetching, decoding, executing and storing.
For example, to do the
add
instruction above the CPU must- Fetch : get the instruction from memory into the processor.
- Decode : internally decode what it has to do (in this case add).
- Execute : take the values from the registers, actually add them together
- Store : store the result back into another register. You might also see the term retiring the instruction.
CISC v RISC
No comments:
Post a Comment